1. Field of the Invention
The present invention relates to a control system of a DC to DC converter that drives a switching device in the DC to DC converter.
2. Background Art
For a control system of a DC to DC converter of such a kind, a system having the configuration shown in FIG. 6 is known. FIG. 6 is a block diagram showing an example of a related control system of a DC to DC converter. The control system of a DC to DC converter is provided with a DC to DC converter section 100 and a control section 101 controlling the DC to DC converter section 100.
The DC to DC converter section 100 has a configuration in which a choke coil L is connected to a positive power supply through a switching device 102 with one end thereof and to an output terminal 103 with the other end and, along with this, a rectifying diode D, having the anode thereof on the ground side, is connected between a connection point of the choke coil L with the switching device 102 and the ground. In the configuration, a smoothing capacitor C is further connected between a connection point, at which the choke coil L is connected to the output terminal 103, and the ground.
While, the control section 101 is provided with an error amplifier 105, an overvoltage comparator 106 and a pulse-width modulation (PWM) signal generating circuit 107.
The error amplifier 105 amplifies a difference voltage between a feedback voltage Vd supplied to an inverting input side and a reference voltage Vref supplied to a non-inverting input side to output an error voltage Vea. The feedback voltage Vd is a voltage to which an output signal Vout outputted to the output terminal 103 is divided by voltage dividing resistors Rd1 and Rd2 to be fed back.
The overvoltage comparator 106 compares a second overvoltage threshold voltage Vref2 supplied to an inverting input side and the feedback voltage Vd supplied to a non-inverting input side to output a skip signal Vskp. The second overvoltage threshold voltage Vref2 is an overvoltage threshold voltage higher than the reference voltage Vref for which threshold voltage an additional voltage ΔV is added to the reference voltage Vref.
The PWM signal generating circuit 107 has the error voltage Vea from the error amplifier 105 and the skip signal Vskp from the overvoltage comparator 106 inputted to produce a pulse driving signal Vdrv as a pulse-width modulation signal. The pulse driving signal Vdrv outputted from the PWM signal generating circuit 107 is supplied to the switching device 102 for the on-off driving thereof.
Here, an on-time Ton of the pulse driving signal Vdrv to the error voltage Vea of the error amplifier 105 becomes as shown in a characteristic diagram in a circuit block of the pulse-width modulation signal generating circuit 107. The characteristic curve shown in the characteristic curve diagram is set so that the on-time Ton as a pulse width keeps the minimum on-time Tmin while the error voltage Vea reaches a set voltage Vea1 from zero and, after the error voltage Vea exceeds the set voltage Vea1, increases in direct proportion to an increase in the error voltage Vea. Since the pulse width of the pulse driving signal Vdrv as a pulse-width modulation signal is determined on the basis of the on-time Ton, when the on-time Ton as a pulse width is set at the minimum on-time Tmin, the pulse width of the pulse driving signal Vdrv as a pulse-width modulation signal becomes minimum and after the on-time Ton as a pulse width exceeds the minimum on-time Tmin, the pulse width also increases.
Moreover, in the pulse-width modulation signal generating circuit 107, the input of a high-level skip signal Vskp from the overvoltage comparator 106 when the feedback voltage Vd becomes equal to or more than the second overvoltage threshold voltage Vref2 (=Vref+ΔV) causes the skip signal Vskp to skip the pulse of the pulse driving signal Vdrv while the skip signal Vskp is at a high level.
Here, two kinds of use can be considered for the overvoltage comparator 106, namely reduction of a switching loss at the time under a light load and prevention of an overvoltage that can not be permissible at the time of transient response.
The reduction of a switching loss at the time under a light load is to reduce a switching loss by skipping the pulse of the pulse driving signal Vdrv and, along with this, to prevent the output voltage Vout from increasing when a load connected to the output terminal 103 is brought to be lightened. When the pulse width of the pulse driving signal Vdrv reaches the minimum on-time Tmin, even though the error voltage Vea from the error amplifier 105 is reduced, the pulse width is kept at the minimum on-time Tmin and is not narrowed. This, when the state is kept as it is, results in a continuous increase in the output voltage Vout and, along with this, an increase also in the feedback voltage Vd. For preventing this, the overvoltage comparator 106 is used by which a feedback voltage Vd becoming equal to or more than the second overvoltage threshold voltage Vref2 brings a skip signal Vskp into a high level to skip pulses in a pulse driving signal Vdrv outputted from the PWM signal generating circuit 107. This reduces the number of times of switching carried out by the switching device 102 at the time under a light load to enable reduction in losses due to switching, which can prevent the output voltage Vout from increasing. By giving attention to the function that can prevent the output voltage Vout from increasing, the minimum pulse width is sometimes set intentionally. In this case, the control of the output voltage is carried out by the overvoltage comparator 106 regardless of the error amplifier 105. With the level of the skip signal Vskp from the overvoltage comparator 106 brought from a high level to a low level, switching with the minimum pulse-width occurs to cause a slight increase in the feedback voltage Vd. With the feedback voltage Vd becoming equal to or more than the second overvoltage threshold voltage Vref2, the level of the skip signal Vskp outputted from the overvoltage comparator 106 is reversed to a high level to stop the switching of the switching device 102. Moreover, by repeating an operation, in which when the feedback voltage Vd is reduced by the load current down to a voltage smaller than the second overvoltage threshold voltage Vref2, the level of the skip signal Vskp outputted again from the overvoltage comparator 106 is brought to a low level, the value of the output voltage Vout is maintained at a constant value. Therefore, in the control system, for bringing the output voltage Vout close to the target voltage, it is preferable to make the additional voltage ΔV small to bring the second overvoltage threshold voltage Vref2 close to the reference voltage Vref.
While, there is also a proposal as the following for reducing a switching loss (see JP-A-2001-16849, for example). According to the proposal, in a switching converter in which the minimum value of the on-period of a switching pulse as the pulse driving signal Vdrv is provided for reducing power consumption in a power supply section during standby (at the time under a light load) of a device connected to the switching converter, the reduction in an output voltage of an error amplifier to a specified voltage or less makes the switching pulse skipped to reduce a switching loss.
Even in the case in which the error voltage Vea of the error amplifier 105 is high to some extent to cause no pulse width as the on-time Ton to reach the minimum on-time Tmin yet, a load current sometimes reduces abruptly like in the case when the mode of the load is switched to a standby mode in a large scale integrated circuit such as a microprocessor, for example. In this case, the reduction in the error voltage Vea from the error amplifier 105 is too insufficient to follow the abrupt reduction in the load current to cause an increase in the output voltage Vout. By the increase in the output voltage Vout, the feedback voltage Vd exceeds the second overvoltage threshold voltage Vref2, by which the level of the skip signal Vskp outputted from the overvoltage comparator 106 is inverted to be at the high level to stop the switching of the switching device 102. As a result, an increase in the output voltage Vout is inhibited so that no feedback voltage Vd exceeds the second overvoltage threshold voltage Vref2. Moreover, the error voltage Vea of the error amplifier 105 reduces with a speed corresponding to the difference between the feedback voltage Vd and the reference voltage Vref. When the error voltage Vea of the error amplifier 105 reduces to a voltage close to the voltage of a specified value corresponding to a load current, the control operation returns to a normal output voltage control by the error amplifier 105. In this case, a small value of the additional voltage ΔV causes the feedback voltage Vd to be limited to a low value. This causes the reduction in the error voltage Vea to become slow to result in a lengthened time taken until the operation returns to a control operation carried out by the error amplifier 105. Therefore, the additional voltage ΔV is desirably set high within a range being capable of suppressing the increase in the output voltage Vout.
Namely, a control system of a DC to DC converter system according to the related art has the following problems. An additional voltage ΔV set small enables an error between the output voltage Vout and a target voltage to be made small under such a light load condition that the output voltage Vout is controlled by the overvoltage comparator 106. However, under such a heavy load condition that the output voltage Vout is controlled by the error amplifier 105 in a steady state, after the overvoltage comparator 106 is operated for transient protection against an excessive overvoltage, the operation returns to the control carried out by the error amplifier 105. This causes the return to the control carried out by the error amplifier 105 to be delayed. While, when a large additional voltage ΔV is set, the foregoing process is reversed to present problems of making it impossible to actualize both of the improvement in output voltage accuracy under a light load condition and the quick return to a normal control after an overvoltage protection operation under a heavy load condition.
Moreover, in the example of a related control system of a DC to DC converter described in JP-A-2001-16849 cited in the foregoing, a switching pulse is made skipped on the basis of the output of the error amplifier, so that in the case in which the output voltage Vout is abruptly increases by a sudden change in a load, the converter can not respond to the increase. Therefore, it becomes indispensable to additionally provide an overvoltage protection circuit. This causes the function of skipping (stopping) the switching pulse to be doubly provided in both the error amplifier and the overvoltage protection circuit to create a problem of increasing a circuit scale and, along with this, a problem of how to adjust the doubly provided functions when there is a difference between the outputs of the two circuits.
Accordingly, the invention was made by paying attention to the unsolved problems in the examples of the related control system of a DC to DC converter with an object of providing a control system of a DC to DC converter in which a switching pulse is skipped according to the output of an overvoltage protection circuit rather than the output of an error amplifier and, along with this, both of an improvement in output voltage accuracy at the time under a light load and a quick return to a normal operation after an overvoltage protection operation at the time under a heavy load can be actualized.